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src/sid/component/cgen-cpu/mep ChangeLog ivc2- ...
- From: dj at sourceware dot org
- To: sid-cvs at sourceware dot org
- Date: 24 Jun 2009 03:06:41 -0000
- Subject: src/sid/component/cgen-cpu/mep ChangeLog ivc2- ...
CVSROOT: /cvs/src
Module name: src
Changes by: dj@sourceware.org 2009-06-24 03:06:41
Modified files:
sid/component/cgen-cpu/mep: ChangeLog ivc2-cop.cxx ivc2-cpu.h
mep-cop1-16-decode.cxx
mep-cop1-16-sem.cxx
mep-cop1-32-decode.cxx
mep-cop1-32-sem.cxx
mep-cop1-48-decode.cxx
mep-cop1-48-sem.cxx
mep-cop1-64-decode.cxx
mep-cop1-64-sem.cxx
mep-core1-decode.cxx mep-cpu.h
mep-decode.cxx mep-desc.h
Log message:
[cgen]
* intrinsics.scm: Updates to support IVC2.
(belongs-to-group?): Check IVC2 slots.
(-slots-attribute): New.
(targets::attributes): Add SLOTS.
(target:add-well-known-intrinsics): Add CPMOV.
(md-insn): Add CPTYPE and CRET?.
(add-md-insn): Likewise.
(add-intrinsic-for-isa): Disable the duplicate tests, as IVC2 has
duplicate insns with different bit patterns.
(write-cgen-insn?): Add cret? support.
(intrinsics.h): Add vector types.
(runtime-op): Add vector support.
(intrinsic-protos.h): Let GCC define its types. Add cret? support.
* cpu/mep-core.cpu: Add CPTYPE and CRET attributes.
* cpu/mep-ivc2.cpu: Update all insns to include type information.
(h-cr-ivc2): Default to typeless.
(h-ccr-ivc2): Fix register width.
(SLOTS): Fix values and default.
(ivc2_*): Add control register names.
(crop, crqp, crpp, croc, crqc, crpc): Default to typeless.
[opcodes]
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
[sid/component/cgen-cpu/mep]
* ivc2-cop.cxx (ivc2_cphadd_w): Change to return value.
(ivc2_cpsubaca0u_b): Remove debug line.
* ivc2-cpu.h (ivc2_cpccadd_b): Change to return value.
* mep-cop1-16-decode.cxx: Regenerate.
* mep-cop1-16-sem.cxx: Regenerate.
* mep-cop1-32-decode.cxx: Regenerate.
* mep-cop1-32-sem.cxx: Regenerate.
* mep-cop1-48-decode.cxx: Regenerate.
* mep-cop1-48-sem.cxx: Regenerate.
* mep-cop1-64-decode.cxx: Regenerate.
* mep-cop1-64-sem.cxx: Regenerate.
* mep-core1-decode.cxx: Regenerate.
* mep-cpu.h: Regenerate.
* mep-decode.cxx: Regenerate.
* mep-desc.h: Regenerate.
Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/ChangeLog.diff?cvsroot=src&r1=1.9&r2=1.10
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/ivc2-cop.cxx.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/ivc2-cpu.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-16-decode.cxx.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-16-sem.cxx.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-32-decode.cxx.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-32-sem.cxx.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-48-decode.cxx.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-48-sem.cxx.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-64-decode.cxx.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cop1-64-sem.cxx.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-core1-decode.cxx.diff?cvsroot=src&r1=1.5&r2=1.6
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-cpu.h.diff?cvsroot=src&r1=1.3&r2=1.4
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-decode.cxx.diff?cvsroot=src&r1=1.5&r2=1.6
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sid/component/cgen-cpu/mep/mep-desc.h.diff?cvsroot=src&r1=1.4&r2=1.5