[patch] Hacky fix for -ve shifts in m32r decode2.c for cgen 1.1
Frank Ch. Eigler
fche@redhat.com
Sun Jul 12 02:22:00 GMT 2009
Doug Evans <dje@sebabeach.org> writes:
> [...]
> Btw, has the sid m32r simulator been tested recently?
Not as far as I know.
> It's doing things like:
> m32rbf.cxx:
> else // pair of short instructions
> {
> UHI first = insn >> 16;
> sem->decode (this, pc, first, first);
> }
> and
> m32r-decode.cxx:
> unsigned int val = (((insn >> 24) & (15 << 4)) | ((insn >> 20) & (15 << 0)));
> switch (val)
> {
> case 0 :
> entire_insn = entire_insn >> 16;
>
> Note that
> - insn is being shifted by 16 tis and then by 24 bits,
Dunny, maybe this particular switch does not activate in the first
place for 16-bit short instructions?
> - after entire_insn >>= 16, it's been shifted by 32 bits.
(But is the value used after this point?)
- FChE
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