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Make: double-colon rules; additive "clean" targets; MAKECMDGOALS

This probably isn't the right place to ask this, but I'm not aware of a
mailing list where I can ask detailed questions about GNU Make.  I might use
the "gnu.misc.discuss" newsgroup, but I don't have access to news here.

I'm trying to work with a complex Makefile system (on Cygwin).  Each
directory is structured similarly, where there is a Makefile, but underneath
that directory is a set of "target" directories.  Each time a "make" is done
in the directory, it actually figures out the correct "target" subdirectory,
then does something like the following:

	${MAKE} -C <targetdir> -f ../Makefile MAKEFLAGS=${MAKEFLAGS}

The Makefile has several levels of included ".mk" files which implement this

One of the things defined in one of the included "mk" files is a generic
"clean" target.  Since all of the applications are structured similarly,
this normally does everything that's necessary.  However, in a couple of
cases, I need to do a "clean" task specific to the application, in addition
to the generic rule.

>From past experience, I thought this was easy.  If I just make the generic
clean rule a "double-colon" rule, and then I create my application-specific
"clean" rule using a double colon, then it should execute both rules.
Unfortunately, it does not.  When I add my specific "clean" rule, that's all
that gets executed.  No errors, it just executes the specific one and
ignores the generic one.  If I comment out the specific one, it executes the
generic one.

I've browsed through the GNU make manual, but I didn't see anything obvious
that would address this.

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