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Digital Design with ModelSim, Verilog, VHDL
- From: Arnd Riebartsch <arnd at arieba dot net>
- To: cygwin at sources dot redhat dot com
- Date: Wed, 14 May 2003 16:47:19 -0500
- Subject: Digital Design with ModelSim, Verilog, VHDL
- Reply-to: arnd at arieba dot net
Modelsim is a great simulation-tool for programming of VLSI Asic's/FPGA's/CPLD's/SoC's.
Since I was involved heavily with the use of ModelSim, I recently created a manual, which can be used especially for self-study purposes.
I would be glad, if someone could forward my link (http://www.arieba.net/simulators.htm#ModelSim) to
Nevertheless I am also interested in open positions in Design/Verification and/or AE positions !
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