[PATCH] MEMORY_BARRIER default
Jakub Jelinek
jakub@redhat.com
Fri Mar 22 00:28:00 GMT 2002
On Thu, Mar 21, 2002 at 12:35:04PM -0800, Ulrich Drepper wrote:
> On Thu, 2002-03-21 at 11:46, Jakub Jelinek wrote:
>
> > Shouldn't sysdeps/ia64/pt-machine.h instead define a
> > MEMORY_BARRIER (to something like:
> > __asm__ __volatile__("" : : : "memory");
> > )?
>
> This looks more correct. Though this should probably be the default for
> all platforms which don't define specific BARRIER macros.
Like this?
2002-03-22 Jakub Jelinek <jakub@redhat.com>
* internals.h (MEMORY_BARRIER): Clobber memory if architecture doesn't
define its own barrier.
* sysdeps/mips/pt-machine.h (MEMORY_BARRIER): Remove.
--- libc/linuxthreads/sysdeps/mips/pt-machine.h.jj Fri Mar 22 09:28:10 2002
+++ libc/linuxthreads/sysdeps/mips/pt-machine.h Fri Mar 22 09:28:29 2002
@@ -30,10 +30,6 @@
extern long int testandset (int *spinlock);
extern int __compare_and_swap (long int *p, long int oldval, long int newval);
-/* Memory barrier. */
-#define MEMORY_BARRIER() __asm__ ("" : : : "memory")
-
-
/* Spinlock implementation; required. */
PT_EI long int
--- libc/linuxthreads/internals.h.jj Fri Mar 22 09:19:41 2002
+++ libc/linuxthreads/internals.h Fri Mar 22 09:25:28 2002
@@ -194,11 +194,12 @@ static inline int nonexisting_handle(pth
#endif
/* If MEMORY_BARRIER isn't defined in pt-machine.h, assume the architecture
- doesn't need a memory barrier instruction (e.g. Intel x86). Some
+ doesn't need a memory barrier instruction (e.g. Intel x86) and just prevent
+ the compiler from caching memory structures in registers accross it. Some
architectures distinguish between full, read and write barriers. */
#ifndef MEMORY_BARRIER
-#define MEMORY_BARRIER()
+#define MEMORY_BARRIER() __asm__ __volatile__ ("" : : : "memory")
#endif
#ifndef READ_MEMORY_BARRIER
#define READ_MEMORY_BARRIER() MEMORY_BARRIER()
Jakub
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