Updated: cpuid 20230614

Cygwin cpuid Maintainer Brian.Inglis@Shaw.ca
Sat Jun 17 19:04:53 GMT 2023

The following package has been upgraded in the Cygwin distribution:

* cpuid		20230614

Displays detailed information about the CPU(s) gathered from the
CPUID instruction, and also determines the exact model of CPU(s).
Where /proc/cpuinfo shows features important to a system, cpuid shows
what every feature in each CPU's architecture does.
It is updated and released frequently to stay current with Intel and
AMD information and supports other vendors' chips.

See the project home page for more information:


For information about changes since the previous Cygwin release,
see below or /usr/share/doc/cpuid/ChangeLog after installation.

Wed Jun 14 2023		20230614


- Improved (synth) identification for (0,6),(5,5),10 Intel Xeon Scalable
  (3rd Gen) (Cooper Lake A0), based on 634897 doc.
- Changed (synth) identification for (0,6),(6,12) Intel Xeon D-1700/2700
  (Ice Lake-D). Intel docs 714071 claim the stepping is U1/U2, which
  contradicts ILPMDF*. I'm using the actual docs.
- Updated comments with new Intel docs.
- Changed "Intel Scalable" to "Intel Xeon Scalable".
- Added (synth) differentiation for (0,6),(9,10),4 Intel Pentium Gold
  8500 series.
- Made the (simple synth) fields non-default. Too many people were
  interpreting them as definitive and ignoring the much better (synth)
  leaf, which uses the entirety of cpuid information. This impacts
  leaves 1, 0x80000001, and 0x80860001.  The (simple synth) fields still
  are available, but only with the -S/--simple option.
- Organized option flags that need to be passed deeply down in the
  print_reg* functions into a new print_opts_t, which will make future
  options easier to add.
- Renamed the old "try" variables to "sub". The word "try" was a remnant
  of the original leaf 4 subleaf implemntation, before subleaves were
  commonplace. For leaf 4, one just kept "trying" to read more cache
  data until it failed. But most subleaves don't work that way.
- Updated (synth) decoding for (0,6),(8,15),{7,8} to mention steppings
  {S2,S3} from ILPMDF* 20230512.
- Added (synth) decoding for (0,6),(11,14) pure Atom x7000E, as a
  variation on other Alder Lake-N CPUs.
- Added (synth) decoding for (0,6),(9,10),4 Atom C1100 Arizona Beach.


- Added new Intel docs.
- Added 613537, the new pub number for 336065, Intel Xeon Processor
  Scalable Family Specification Update.

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