[PATCH?] Separate pthread patches, #2 take 2.
Fri Jun 5 13:53:00 GMT 2009
Corinna Vinschen wrote:
> On Jun 4 02:52, Dave Korn wrote:
>> Dave Korn wrote:
>>> Dave Korn wrote:
>>>> The attached patch implements ilockexch and ilockcmpexch, using the inline
>>>> asm definition from __arch_compare_and_exchange_val_32_acq in
>>>> glibc-2.10.1/sysdeps/i386/i486/bits/atomic.h, trivially expanded inline rather
>>>> than in its original preprocessor macro form.
>>>> It generates incorrect code.
>>> This much looks like it's probably a compiler bug.
>> Let's see whether anyone else agrees:
> When you checked in this change, I'll create a 1.7.0-49 test release.
This is the final version I committed. It is the glibc version, with the
addition of the memory clobber, which that discussion revealed was absolutely
required, and the use of a register asm var to feed the inline asm, which is
in accordance with documented practice in the gcc manual. (This now leaves
only one difference between the glibc version and the version I posted, which
is the use of a "+a" write-only output constraint paired with a numeric "0"
matching input constraint in glibc's version compared with a single output
operand using the read-write constraing "=a" in my version. These should in
fact be exactly identical in terms of what they indicate to reload, in any case.)
I have also manually inspected the generated assembly from thread.cc and
shared.cc in a cygwin DLL build and verified that it is correct and efficient,
and have installed the resulting DLL and retested all Thomas Stalder's
testcases and the previously intermittently failing pthread7-rope testcase
from libstdc++ testsuite. Committed with this ChangeLog:
* winbase.h (ilockexch): Fix asm constraints.
Libstdc++ plan after the weekend. Cheers all!
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