[PATCH] Cygwin: gendef: Implement stabilize_sig_stack for aarch64

[Thirumalai Nagalingam]

Hi all,

This patch is not for review and a V2 is upcoming.

The current version contains a few known issues that have already been
fixed by Igor Podgainoi <Igor.Podgainoi@arm.com<mailto:Igor.Podgainoi@arm.com>>.  Those fixes will be
contributed directly by Igor by a V2 patch, which will be posted to this same thread.

Notes:
Attached is a patch that adds an ARM64 stub for the `stabilize_sig_stack` routine
in the gendef script. The changes are documented with inline comments and
should be self-explanatory.
I would also like to thank Radek Bartoň <radek.barton@microsoft.com<mailto:radek.barton@microsoft.com>> for his
initial contributions to this effort.

Thanks & regards
Thirumalai Nagalingam
<thirumalai.nagalingam@multicorewareinc.com<mailto:thirumalai.nagalingam@multicorewareinc.com>>

In-lined patch:

diff --git a/winsup/cygwin/scripts/gendef b/winsup/cygwin/scripts/gendef
index ff13f1daa..0b2d3db9b 100755
--- a/winsup/cygwin/scripts/gendef
+++ b/winsup/cygwin/scripts/gendef
@@ -464,7 +464,83 @@ _sigbe:
 sigdelayed:
 _sigdelayed_end:
        .global _sigdelayed_end
+       .seh_proc stabilize_sig_stack
 stabilize_sig_stack:
+    // prologue
+    stp     fp, lr, [sp, #-0x10]!        // save FP and LR registers
+    .seh_save_fplr_x 0x10
+    mov     fp, sp                       // set frame pointer for unwinder
+    .seh_set_fp
+    .seh_endprologue
+
+    ldr     x10, [x18, #0x8]             // load TLS block base pointer into x10
+
+    // try to acquire the lock
+    mov     w9, #1                       // value to store (1 == locked)
+    ldr     x11, =_cygtls.stacklock      // load the symbol offset
+    add     x12, x10, x11                // x12 = tls_base + &stacklock
+1:
+    ldaxr   w13, [x12]                   // load old lock value
+    stlxr   w14, w9, [x12]               // attempt to store 1
+    cbnz    w14, 1b                      // if store failed, retry
+    cbz     w13, 2f                      // if lock was acquired, continue
+    yield                                // yield to allow other threads to run
+    b       1b                           // retry acquiring the lock
+
+2:
+    // lock acquired, increment incyg counter
+    ldr     x11, =_cygtls.incyg          // load the symbol offset
+    add     x12, x10, x11                // x12 = tls_base + &incyg
+    ldr     w9, [x12]                    // load current value of incyg
+    add     w9, w9, #1                   // increment incyg counter
+    str     w9, [x12]                    // store back incremented value
+
+    // check current_sig
+    ldr     x11, =_cygtls.current_sig    // load the symbol offset
+    ldr     w9, [x10, x11]               // load current value of current_sig
+    cbz     w9, 3f                       // if no current signal, jump to cleanup
+
+    // release lock before calling signal handler
+    ldr     x11, =_cygtls.stacklock      // load the symbol offset
+    add     x12, x10, x11                // x12 = tls_base + &stacklock
+    ldr     w9, [x12]                    // load current value of stacklock
+    sub     w9, w9, #1                   // decrement stacklock
+    stlr    w9, [x12]                    // store with release semantics
+
+    // prepare arg and call handler
+    ldr     x0, =_cygtls.start_offset    // load the symbol offset
+    add     x0, x10, x0                  // x0 = tls_base + &start_offset
+    bl      _ZN7_cygtls19call_signal_handlerEv
+
+    // call may clobber x10, restore TLS base
+    ldr     x10, [x18, #0x8]             // reload tls_base
+
+    // decrement incyg
+    ldr     x11, =_cygtls.incyg
+    add     x12, x10, x11
+    ldr     w9, [x12]
+    sub     w9, w9, #1
+    str     w9, [x12]
+
+    // loop to handle another signal
+    b       1b
+
+3:
+    // no signal to handle, decrement incyg counter
+    ldr     x11, =_cygtls.incyg
+    add     x12, x10, x11
+    ldr     w9, [x12]
+    sub     w9, w9, #1
+    str     w9, [x12]
+
+    mov     x0, x10                      // return TLS address in x0 (return register)
+
+    // epilogue
+    .seh_startepilogue
+    ldp     fp, lr, [sp], #0x10
+    .seh_endepilogue
+    ret
+    .seh_endproc
 EOF
        }
     }

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