Shares with strange ACL settings

[Corinna Vinschen]

On Aug 14 20:25, Achim Gratz wrote:
> Corinna Vinschen writes:
> > Btw., can you please also check /proc/cpuinfo?
> 
> Yes, I have both AMD and Intel machines I can test this with.
> 
> > As discussed, Cygwin's emulation fell short on L3 cache info.  I now
> > added code to fetch L3 cache info as well as correct processor topology
> > information on Intel CPUs.  For AMD CPUs the topology and cache
> > info was already fine.  Linux does not show L3 cache info for AMD CPUs
> > afaics, so I also didn't add that to Cygwin.
> 
> I can't test this with a new enough kernel for AMD, but perhaps someone
> is testing some new iron/OS combination and I can get that information
> from them.  For Intel since some time the L3 cache size is shown (older
> kernels would show you the per-node L2 cache size IIRC).

Recent kernels as well.  I just tested this with a 4.1.4 kernel, and the
source code of the upstream master branch shows no changes in terms of
the cache info on AMD CPUs.

A bit surprising, considering that the L3 cache info is apparently
available using the same CPUID leaf.


Corinna

-- 
Corinna Vinschen                  Please, send mails regarding Cygwin to
Cygwin Maintainer                 cygwin AT cygwin DOT com
Red Hat
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